If someone has some professional equipment that can produce DSF files from very high-rate PCM (1,5-6 MHz), I'd appreciate some test tones assets at different very high frequencies. I had to use the DSD Processor and it's limited to 768 kHz. Tried to use Aul Converter to create some DSF test files but it just produces an empty file. The D50s doesn't have a selectable fc for DSD unfortunately.īut at least I can tell that if there's a conversion to PCM, it's using at least an fs at or above 768 kHz I'm just puzzled at the very low voltage level on the line-out which is 120-150 mV below the Aune X8. Perfect for my needs and it also has the socketed op-amp which is nice for experiment. I'm using now the Topping D50s, which btw I like it very much considering the 100€ something I paid for on Amazon 2nd hand. Not sure if this is this a good approach but it's definitely interesting.Īnyway I tried to test with the scope mentioned in that thread and made some sine test tones at very high frequencies. Most of the important stuff it's probably undisclosed. Other innovations are not publicly disclosed – they are retained as ESS ΣΔ modulators refer to US Patent 7,058,464 which describes one difference. To understand how ESS modulators may differ from more conventional Maybe there's some more info on the patent mentioned but I doubt it: Audio data fromĪll sources is now in the high speed clock domain and sent to The “burst” mode over-sampled filter output into the preciselyĬorrect clock edge of the high speed clock. Two steps: jitter rejection and rate conversion are able to take Proprietary jitter reduction circuit that operates with the rateĬonverter and is able to achieve a 100% jitter rejection. Little as 4Khz in one step and secondly, the process isĮssentially perfect to the bit level – the output DNR exceedsġ75dB and the THD is correspondingly high.Īs well as sample rate conversion the Sabre has a Firstly the rate conversion is unlimited –Īllowing the Sabre to always achieve a conversion into itsĮxceptionally high clock rate (as much as 40Mhz) from as Poly-phase filter approach and is described in great detail in The Sabre DAC rate converter has two advantages compared to the We must remove the image that will be created when we upsample Specifically, we now need to apply a filter to the digital data – Interface signal, the Sabre DSP uses the arrival time of theĭata as a gating signal for the first part of the processing. Rather than trying to lock a PLL to the data rate of this Which seems to be the reason they need the ASRC in the final stage before the modulators. They also talk about the I2S and DSD data streams and the fact they oversample "as much as 40 MHz" the incoming data. Modulator is well below −160dB (the integrated noise is lessįrom what I understand reading there's an n number of 6-bit 40 MHz modulators in parallel/serial/mixed configuration? Typically six bit, and since it operates to 90% modulationĭepth and at rates up to 40Mhz, the noise floor from the This is achieved byĪ cascade of independently stabilized lower-order modulatorsĪdjustable (user software configurable) output bit width, I'm still reading it but it seems to me they are something very peculiar.ĭiffer in detail from conventional ΣΔ modulators in that theyĬan operate up to 100% modulation depth. I was able to download the mentioned technical paper on the Sabre DAC internal operations via the Wayback machine. What is agreed to be a concern is the ASRC and the modulators. Volume control in DSD domain seems possible, doesn't necessarily mean it's being converted to PCM. It also has a Preamp mode but I wonder if it really is bypassing volume control for DSD.įrom what I've read in that thread it's basically impossible to tell if the ESS is doing conversion to PCM or not. I see there's a reasonably priced and decently performing SMSL D300 using it. I was just starting to look around and you came just about at the right time But I didn't find this nice block diagram!
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